About PCI-e

A tutorial of PCIe.

http://zone.ni.com/devzone/cda/tut/p/id/3767

• Similar to network protocols, the architecture of PCIe consists of layers: physical layer, data-link layer, transaction layer, software layer.
  
• Lane - a basic physical layer channel, a device can request more than one lanes and combine those lanes for higher bandwidth
• Data-link layer: enable reliable data transmission between pairs. Use sequence number, CRC, and retransmissions to ensure reliable communication.
  
• Transaction Layer: creates request packets and serve corresponding response packets from the data-link layer. Provide address spaces.

Northbridge
Southbridge


IO Virtualization
Part 1: http://www.embedded.com/design/networking/217701325

• What is IO virtualization? why is it needed?

System Questions

1) x86 & ARM platform

2) qualcomm snapdragon vs samsung ARM
both ARM-based?
ASIC: application specific IC
SoC: system-on-chip
integrated processors for embedded systems
bus, I/O chipsets, memory controllers (RAM,ROM,...), graphics accelerator

3) NAND vs NOR
NAND can be denser (most usb flash memory)
NOR is more reliable? (used for BIOS ROM)

4) HDMI mirror?

5) embedded controller (EC)

6) bluez

7) at command set (for serial terminal?)

8) SSD, DRAM, SRAM, flash memory
SRAM: static RAM, faster, expensive, less power in idle state
DRAM: dynamic RAM
SDRAM: synchronous DRAM
EEPROM: early flash, byte-wide erasable, flash is usually page-wide erasable